The present invention relates to computer microprocessors, and more specifically, to adaptive debug tracing for computer microprocessors.
In computer microprocessors, signals that show the state of the machine are gathered into debug busses and are written cycle by cycle into outwardly visible memory structures, called trace arrays, to offer some visibility into the internal workings of microprocessors during debug stages on a fabricated microprocessor
However, due to physical constraints, all of the signals necessary to understand the full state of the machine cannot be included on the debug bus. Therefore a selection method is necessary to choose a small group of signals that represent various sections of the microprocessor.
Current selection techniques allow only one set of signals per debug bus to be sent to the trace arrays during operation. These sets of signals may or may not be relevant to the problem at hand. The signals are generally chosen through predetermined selects that are scanned in during startup. The saved cycles of that signal group's behavior are visible in the trace array upon a failure.
Since the selected signals are static, these signals can only be changed by restarting the processor and scanning in new select signals. When an error is detected, the trace array will freeze this data, and preserve the states of the processor prior to the error condition. However, since the debug bus is set statically at the time the processor is powered on, the signal group selected at startup, and captured at the time of error, may not be necessarily relevant to the issue that the processor is experiencing.
Conventionally, the lab debugging process involves iterative guesswork, restarting the machine, and scanning in a new set of multiplexer (mux) selects based on the behavior exhibited by the currently selected signal group repeatedly until the faulty behavior is exposed.
This entire process involves a lot of time spent looking for relevant data and may take even longer, because debug busses are used to debug fails that are not cycle reproducible. However, there is only a limited time to debug, because once a fail is found, the manufacturing pipeline halts and productivity is lost.